Configurable electronic circuits are defined as being formed of an elementary cell duplicated a certain number of times, and whose inputs/outputs are interconnected by a network of programmable switches. In this regard mention may be made of semi-custom programmable circuits, known as Field-Programmable Gate Array (FPGA) circuits. In FPGA circuits, the elementary cells are programmable memories or look-up tables carrying out logic operations at the bit level, that is, on a limited number of bits, for example 2 to 4 bits, and yielding a result likewise on several bits, for example 1 or 2 bits. The family of Virtex products marketed by the company Xilinx offers such FPGA circuits also comprising a few dedicated arithmetic functions, as well as memory elements.
By using a conventional synthesis method, associated with mapping and routing algorithms, any function described in an RTL language can be implemented on such an FPGA circuit, as long as the circuit has a sufficient number of resources (both at the functional level and at the interconnections level) for implementing all the operations and all the variables described in the original description in the RTL language.
In configurable circuits such as these, the quantity of resources intended to operate at the bit level is considerably bigger than the quantity of arithmetic resources. Furthermore, one cannot really speak of truly arithmetic resources, since the arithmetic operators share the same routing resources as those dedicated to the bit level. Consequently, the use of such circuits FPGA for carrying out essentially arithmetic functions is not really efficient either from a surface area standpoint or from a power consumption standpoint.
Other types of configurable circuits exist, comprising elementary cells of different types, for example a memory element, an arithmetic and logic unit, or possibly a microcontroller. Such examples of configurable circuits are described in the article by Hui Zhang et al. titled “A 1-V Heterogeneous Reconfigurable DSP IC for Wireless Baseband Digital Signal Processing”, Journal of Solid-State Circuits, vol. 35, No. 11, November 2000. However, in these reconfigurable circuits, the communication between the various elements is performed asynchronously by transferring data packets. Consequently, it is not possible to use the same mapping methodology as that used in a semi-custom programmable circuit composed of homogenous or common cells. Also, the absence of any tool or methodology renders the use of reconfigurable circuits such as these particularly tricky and inefficient.